搜索资源列表
mips3
- modelsim+dc开发的4级流水线结构的MIPS CPU，完成基本的逻辑运算和跳转。测试程序为希尔排序，结果正确。
ucosii_bsp_jz-20070808
- mips cpu 君正4730 4740的 ucosii 源码 包括系统 摄像头 网络 文件系统等等测试
incaip
- 基于mips CPU，uboot下flash读与LCD显示程序。
disk
- 基于mips cpu,在u-boot系统下磁盘驱动程序。
MIPStest00
- 簡易MIPS CPU程式碼 此CPU包含 shift add sub and or stl beq lw sw 等功能
MIPS五级流水线模拟程序
- MIPS五级流水线模拟程序，能执行简单的MIPS指令，模拟流水线状态及寄存器结果，实现cpu流水的概念-MIPS five-level stream-line simulation program, this program can execute simple MIPS instruction, simulat stream-line s status and register result, and it implements stream-line of cpu.
Debian Etch MIPS image for QEMU
- What is it? A generic stand-alone MIPS program that can do printf on a standard UART. requirements: . CPU has CP0 structure (r4k compatible) Configure: --------------Debian Etch MIPS image for QEMU -
ir-gpio.tar.gz linux 基于mips 架构cpu 的红外驱动
- linux 基于mips 架构cpu 的红外驱动，以及用户空间测试程序,linux on mips architecture cpu infrared driver, as well as user-space test procedures
nandprog
- 君正MIPS CPU通用的boot loader源码，USB接口，学习nand flash编程和MIPS cpu 原理的好资料！通过nandprog将程序下载到君正的板子nand flash 里。-Jun MIPS CPU is a common source boot loader, USB interface, the learning nand flash programming and MIPS cpu principles of good information! By nandpro
ejtag-0.2
- mips e-jtag 加载uboot程序，实现直接控制cpu加载boot loader，无需事先烧写任何程序进flash-mips e-jtag loading uboot procedures to achieve direct control of the cpu load the boot loader, any program without prior programming into flash
initrd
- What is it? A generic stand-alone MIPS program that can do printf on a standard UART. requirements: . CPU has CP0 structure (r4k compatible) Configure: -What is it? A generic stand-alone MIPS program that can do printf on a stan
Project4
- This zipfile is composed of a bunch of MIPS codes that might be helpful to some people who are developing CPU
pipeline
- 用Quartus II 设计的3级流水CPU，指令采用二次重叠执行方式-Quartus II design with three-stage pipeline CPU, instruction execution overlaps with the second time
CU
- mips指令控制器。fpga上板验证实现。为cpu课设重要模块-mips instruction controller.
87361035linux2.6_developer_guide_v1.4.1
- 君正MIPS CPU JZ4740 Linux 2.6 开发手册-MIPS CPU JZ4740 Linux 2.6
super_an218
- Using the 25 MIPS CPU and on-chip ADC, the C8051F300 can perform DTMF tone generation and decoding.
Au1300_B_20090210
- RMI s Au13xx CPU Datasheet. CPU Spec. - MIPS CPU 533,667,800MHz - Video 1280x720 play (Au1370, Au1380) - support memory bus clock 333MHz (DDR2-667) - simular to Au1250-RMI s Au13xx CPU Datasheet. CPU Spec. - MIPS CPU 533,667,800MHz -
CPUsourcecode
- 本设计实现了一个具有标准的32位5级流水线架构的MIPS指令兼容CPU系统。具备常用的五十余条指令，解决了大部分数据相关，结构相关，乘除法的流水化处理等问题，并实现了可屏蔽的中断网络。-This design implements a standard 32-bit 5-stage pipeline architecture of MIPS instruction compatible CPU system. Instructions with more than 50 commonly use
mips
- cpu---risc---mips源代码-cpu---risc---mips
CPU
- 基于32位MIPS流水线CPU，由自己独立完成，-Pipelined 32-bit MIPS-based CPU, by themselves independently,